Titel: Economic high resolution fringe counting for heterodyne interferometers using FPGA technology
Autoren: Meli, Felix, Federal Institute of Metrology METAS, Bern-Wabern, SWITZERLAND
Beitragende: HostingInstitution: Physikalisch-Technische Bundesanstalt (PTB), ISNI: 0000 0001 2186 1887
Seiten:9
Sprache:en
DOI:10.7795/810.20150325E
Art der Ressource: Text / Article
Herausgeber: Physikalisch-Technische Bundesanstalt (PTB)
Rechte: Vervielfältigung nur zum eigenen persönlichen Gebrauch.
Daten: Verfügbar: 2019-09-04
Datei: Datei herunterladen (application/pdf) 789.96 kB (808920 Bytes)
MD5 Prüfsumme: acae6a7b8181057d8e7ee6d5dea4562c
SHA256 Prüfsumme: de0c6680a1c990d467b393245387ce434bcf46588fc19c2b62fb0ffeaf25fbbb
Schlagworte heterodyne interferometry ; FPGA fringe counting ; FPGA phase interpolation ; interferometric displacement measurement ; dimensional metrology
Zusammenfassung: Simple FPGA PCI boards are capable of capturing digital signals up to 40 MHz and analogue signals up to 200 kHz, making them suitable to replace whole machine controllers of multi-axis measuring machines. Unfortunately capturing a 4 MHz heterodyne signal (beat frequency) at a 40 MHz rate will result in a poor phase interpolation. We present a statistical approach to the phase evaluation while maintaining a reasonably high data rate and synchronicity with acquired analogue signals. Sub-nanometre resolution is achieved by averaging counter values sampled asynchronously to the beat frequency. The implemented FPGA program allows signal processing for three simultaneously captured interferometer positions with synchronized 8 channels A/D in- and output, interpolated A-B encoder output signals (usable for motion controller boards) and high speed DMA data transfer to the PC memory all on one PCIe board. Fringe counting works up to 6 MHz covering a speed range of more than ±0.4 m/s. The implemented 64 bit position counters cover measurements up to several meters with sub nm resolution.